changeset 9073:81a383ab33ee jdk8u212-b04-aarch32-190429

8214189: [AArch32] test/hotspot/jtreg/compiler/intrinsics/mathexact/MulExactLConstantTest.java fails on Windows x64 when run with -XX:-TieredCompilation
author andrew
date Tue, 30 Apr 2019 00:53:37 +0100
parents 03e95de3bc18
children 5139bb4cb8a9
files src/cpu/aarch32/vm/assembler_aarch32.cpp src/cpu/aarch32/vm/assembler_aarch32.hpp src/cpu/aarch32/vm/macroAssembler_aarch32.cpp
diffstat 3 files changed, 5 insertions(+), 5 deletions(-) [+]
line wrap: on
line diff
--- a/src/cpu/aarch32/vm/assembler_aarch32.cpp	Mon Apr 29 02:22:56 2019 +0100
+++ b/src/cpu/aarch32/vm/assembler_aarch32.cpp	Tue Apr 30 00:53:37 2019 +0100
@@ -1333,7 +1333,7 @@
 void Address::fp_encode(Instruction_aarch32 *i, CodeSection *sec, address pc) const {
   // ATM works only for immediate
   assert(_wb_mode == off, "Can't do pre or post addressing for vldr, vstr");
-  long offset = _offset;
+  julong offset = _offset;
   if(imm == _acc_mode) {
     if(r15_pc == _base) {
       //Correct the offset if the base is the PC
--- a/src/cpu/aarch32/vm/assembler_aarch32.hpp	Mon Apr 29 02:22:56 2019 +0100
+++ b/src/cpu/aarch32/vm/assembler_aarch32.hpp	Tue Apr 30 00:53:37 2019 +0100
@@ -1163,7 +1163,7 @@
   }
 
   bool encodeable(int decode, address dest) {
-    long offset = dest - pc();
+    julong offset = dest - pc();
     switch(decode) {
       case 0b010:
         // LDR, LDRB, STR, STRB
--- a/src/cpu/aarch32/vm/macroAssembler_aarch32.cpp	Mon Apr 29 02:22:56 2019 +0100
+++ b/src/cpu/aarch32/vm/macroAssembler_aarch32.cpp	Tue Apr 30 00:53:37 2019 +0100
@@ -74,7 +74,7 @@
 int MacroAssembler::pd_patch_instruction_size(address branch, address target) {
   // Note the corrections
   int instructions = 1;
-  long offset = target - (branch + 8); // correct for that PC = PC_this + 2 instructions
+  julong offset = target - (branch + 8); // correct for that PC = PC_this + 2 instructions
   bool add = offset >= 0;
   unsigned insn = *(unsigned*)branch;
   int opc = Instruction_aarch32::extract(insn, 27, 24);
@@ -2940,7 +2940,7 @@
 int MacroAssembler::ldrd(Register Rt, Register Rt2, const Address& adr, Register Rtmp, Condition cond) {
     if((0 == Rt->encoding_nocheck() % 2 &&
          (Rt->encoding_nocheck() + 1 == Rt2->encoding_nocheck())) &&
-      (uabs(adr.offset()) < (1 << 8))) {
+      (uabs((julong) adr.offset()) < (1 << 8))) {
       /* Good to go with a ldrd */
       ldrd(Rt, adr, cond);
       return 0x0;
@@ -2953,7 +2953,7 @@
 int MacroAssembler::strd(Register Rt, Register Rt2, const Address& adr, Condition cond) {
     if((0 == Rt->encoding_nocheck() % 2 &&
          (Rt->encoding_nocheck() + 1 == Rt2->encoding_nocheck())) &&
-      (uabs(adr.offset()) < (1 << 8))) {
+      (uabs((julong) adr.offset()) < (1 << 8))) {
       /* Good to go with a strd */
       strd(Rt, adr, cond);
     } else {